FM - International Conference
Novel Non-volatile Inorganic Memory Devices: materials, concepts and applications


Session FM-1 - Resistance Switching Memories (ReRAM)

FM-1:IL01  Energy-efficiency in Redox-based Memristive Devices
R. WASER, V. RANA, ST. MENZEL, E. LINN, PGI-7 & JARA-FIT, Forschungszentrum Jülich, Jülich, and IWE2 & JARA-FIT, RWTH Aachen University, Aachen, Germany

Redox-Based Resistive Switching Memories (ReRAM), also called nanoionic memories or memristive elements, are widely considered to provide a potential leap beyond the limits of Flash (with respect to write speed, write energies) and DRAM (with respect to scalability, retention times) as well as energy-efficient approaches to neuromorphic concepts.
In terms of information theory, a ReRAM cell operates on the configuration of ions as the state variable. For bipolar resistive switching elements, a range of material systems exist in which ionic transport and redox reactions on the nanoscale provide the essential mechanisms for the switching. One class relies on mobile cations which are easily created by electrochemical oxidation of the corresponding electrode metal, transported in the insulating layer, and reduced at the inert counterelectrode (so-called electrochemical metallization memories, ECM). Another important class (so-called valence change memories, VCM) operates through the migration of ions which constitute the I phase, typically oxygen ions, between a metal electrode and a reduced part of the oxide. Here, the reduction of the cation valences in the cation sublattice provides a local (typically filamentary) metallic or semiconducting phase.

FM-1:IL03  Resistive Switching in the Chalcogenide Compounds AM4Q8 (A= Ga, Ge; M=V, Nb, Ta, Mo; Q=S, Se, Te): Towards Mott Memories
E. JANOD, B. CORRAZE, J. TRANCHANT, M. QUERRÉ, P. STOLIAR, M.-P. BESLAND, L. CARIO, Institut des Matériaux Jean Rouxel, Université de Nantes - CNRS, Nantes Cedex, France; V. TAPHUOC, GREMAN, CNRS UMR 7347-CEA, Université F. Rabelais, UFR Sciences, Parc de Grandmont, Tours, France; M. ROZENBERG, Laboratoire de Physique des Solides, CNRS UMR 8502, Université Paris Sud, Orsay, France; V. DUBOST, T. CREN, D. RODITCHEV, Institut des Nanosciences de Paris, Université Pierre et Marie Curie, CNRS UMR 7588, Paris, France

The AM4Q8 compounds form a family of canonical Mott insulators with remarkable electronic properties, including an electric-field driven resistive switching (RS).
Above a threshold electric field Eth in the 1-7 kV/cm range, RS are volatile, i.e. transient and occurring only during the electric pulse. Our recent work shows that an electronic avalanche, mechanism well established in classical semiconductors, could explain the existence of the RS in these Mott insulators.[1] Moreover our numerical simulations which capture the Mott physics are able to describe accurately the volatile RS.[2]
At larger electric fields (5 to 10 Eth), RS becomes non-volatile. Moreover, the application of further pulses allows to switch back and forth between low and high resistance states. Our STM/STS works show that these non-volatile RS are related to a Mott insulating to metal transition at the nanoscale.
Finally we have deposited thin layers of GaV4S8 and retrieved the RS on small devices at room temperature. AM4Q8 compounds stand therefore, according to the ITRS, as a remarkable member of a new class of Resistive Non-Volatile Memories, the "Mott memories".
[1] V. Guiot et al., Nature Commun. 4, 1722 (2013).
[2] P. Stoliar et al., Adv. Mater. 25, 3222 (2013).

FM-1:IL04  TMO-based Memristive Devices and Application for Neuromorphic Systems
JINFENG KANG, B. GAO, Y.J. BI, B. CHEN, X.Y. LIU, Peking University, Beijing, China; S.M. YU, Arizona State University, Tempe, AZ, USA; H-Y. CHEN, H.-S. PHILIP WONG, Stanford University, Stanford, CA, USA

Transition Metal Oxide (TMO) based resistive switching devices have emerged as having great potential for the application of high-density data storage and processing technology. Meanwhile, biologically inspired neuromorphic computing is an emerging computation paradigm beyond von Neumann computing for the applications such as image processing due to its massive parallelism and adaptivity to the varying and complex input information. TMO-based synaptic devices for neuromorphic systems have attracted much research attention due to its low energy consumption (~pJ) and ability to retain multiple states. To achieve the targets, a novel strategy based on defect engineering, including the material-oriented cell engineering for the materials selection and the innovative operation schemes for the cell switching, was firstly developed to reach the controllable resistive switching behaviors of the RRAM cells. The designed RRAM cells based on defect engineering strategy were experimentally fabricated and demonstrated the excellent resistive switching characteristics. Furthermore, we proposed a novel methodology for TMO-based synaptic devices to enhance the robustness of the RRAM-based synapses of the neuromorphic visual system under the low energy consumption (~pJ) and ability. The designed RRAM-based synapses with sub-pJ energy per spike were demonstrated experimentally. We verified the robustness of the neuromorphic system against the RRAM variability and the tolerance to fault and error of neuromorphic computing.

FM-1:IL05  A Review of Three-dimensional Resistive Switching Cross-Bar Array Memories from the Integration and Materials Property Points of View
JUN YEONG SEOK1, 2, SEUL JI SONG1, JUNG HO YOON1, KYUNG JEAN YOON1, TAE HYUNG PARK1, DAE EUN KWON1, HYUNGKWANG LIM1, 2, GUN HWAN KIM1, DOO SEOK JEONG2, CHEOL SEONG HWANG1, 1Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea; 2Electronic Materials Research Center, Korea Institute of Science and Technology, Seoul, South Korea

Issues in the circuitry, integration, and material properties of the two-dimensional (2D) and three-dimensional (3D) crossbar array (CBA)-type resistance switching memories are described. Two important quantitative guidelines for the memory integration are provided with respect to the required numbers of signal wires and sneak current paths. The merit of 3D CBAs over 2D CBAs (i.e., the decrease in effect memory cell size) can be realized only under certain limited conditions due to the increased area and layout complexity of the periphery circuits. The sneak current problem can be mitigated by the adoption of different voltage application schemes and various selection devices. These have critical correlations, however, with the types of resistance switching memory involved. The problem is quantitatively dealt with using the generalized equation for the overall resistance of the parasitic current paths. Atomic layer deposition was discussed in detail as the most feasible fabrication process of 3D CBA because it can provides the device with the necessary conformality and atomic-level accuracy in thickness control. Other issues related with the line resistance, maximum available current, and fabrication technologies are also reviewed. Then summary and outlook will be provided.

FM-1:IL06  Low-power Operation and Reliability of Oxide-based RRAM
D. IELMINI, DEIB, Politecnico di Milano, Milano, Italy

Resistive switching memory (RRAM) has been proposed as 3D high-density nonvolatile memory (NVM) and storage class memory (SCM) which promises to radically change the computer paradigm. To enter the NVM and SCM segments, however, RRAM must demonstrate low current operation (< 10uA) with superior reliability against read noise and set/reset variability.
This work addresses low-power operation of filament-type RRAM. First, the operation current will be shown to be reduced by controlling the size of the conductive filament (CF) responsible for the low-resistance (set) state in RRAM. Sub-10uA operation will be demonstrated for both unipolar and bipolar RRAM. RRAM reliability will then be addressed by discussing the impact of statistical switching variability and read noise on set/reset window. Statistical variability will be shown to strongly degrade for decreasing operation current, as a result of random few-defect injection to form sub-1nm filaments. Finally, random telegraph noise (RTN) due to trapping/detrapping cycles in proximity of the conductive channel will be described, through experiments at variable filament size, read voltage and temperature. A comprehensive model discussing switching fluctuations and RTN will be presented.

FM-1:IL07  On the Origin of Failure Mechanism of Endurance and Retention of HfO2 based ECM Cells
HANGBING LV, XIAOXIN XU, RUOYU LIU, HONGTAO LIU, QI LIU, SHIBING LONG, MING LIU, Laboratory of Nano-Fabrication and Novel Devices Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

Resistive switching memory is gaining continuous interests from industry and research community, owning to its competitive capability for embedded and high-density applications. From recent publications, several milestones of single cell performance have been achieved, i.e. endurance as high as 1012, retention of 10 yr@85 ℃, speed less than 1 ns, power consumption of sub pJ. Taking into practical application, memory array is the basic form for storage. However, the requirement of reliability in array is much more strict than that in single cell. Endurance and retention are two crucial criteria of reliability. It is urgent to work out the failure mechanisms of endurance and retention. However, up to now, in-depth understandings of the failure mechanisms are still ambiguous. In this work, we studied reliability issues of HfO2 solid electrolyte based RRAM on 1 kb array. Though high temperature endurance test and TEM failure analysis, we clarified the residual Cu accumulation in the gap of conducting filaments with cathode as the main reason for endurance failure. The Cu diffusion from the residual CF to the gap or out of the CF is the failure mechanism for HRS and LRS retention, respectively. The result of retention under different cycling supports the Cu accumulation model well.

FM-1:IL08  CBRAM vs OxRAM: Active Material Selection Depending on the Final Application
E. VIANELLO1, G. MOLAS1, P. BLAISE1, O. THOMAS1, F. LONGNOS1, B. TRAORE1, G. PALMA1, J. GUY1, T. CABOUT1, K. XUE1, M. BERNARD1, A. ROULE1, E. SOUCHIER1, C. CARABASSE1, M. REYBOZ1, H. GRAMPEIX1, J.F. NODIN1, A. TOFFOLI1, E. JALAGUIER1, O. PIRROTTA2, A. PADOVANI2, L. LARCHER2, L. FONSECA3, Y. NISHI4, B. DE SALVO1, L. PERNIOLA1, 1CEA, LETI, MINATEC, Grenoble, France; 2DISMI Università di Modena e Reggio Emilia, Reggio Emilia, Italy; 3State University of Campinas, Brazil; 4Department of Electrical Engineering, Stanford University, California, USA

Resistive Random Access Memories (RRAM) are nowadays considered among the most promising solutions for co-integration with advanced logic CMOS devices, for future μcontrollers applications. The interest of RRAMs is motivated by various advantages that this technology offers as compared to Flash technology. RRAMs offer low operating voltages, low consumption, and can be integrated in the BEOL of a logic circuit. They are based on the reversible formation/disruption of a conductive filament in a resistive layer. The filament can be obtained by migration of oxygen vacancies in transition metal oxides (OXRAM) or by the dissolution of an active electrode in an oxide or chalcogenide based electrolyte (CBRAM). In this work, an overview of our recent research work on RRAM will be given, both at the technology and design level. Performance toward material tuning will be discussed as well as new application features.
Concerning CBRAM, we will present an interface engineering of Ag−GeS2 based cells specifically targeted for FPGA applications: we demonstrate a resistance ratio of 10M. Concerning OXRAM, we will investigate the role of the electrodes on the performances. The memory behavior at high temperature will be studied to evaluate the potentialities for automotive embedded applications.

FM-1:IL09  Evaluating I-V Relations and Defect Distribution of metal1|MIEC|metal2 Devices for Understanding the Functioning of Redox Memory Devices
I. RIESS, D. KALAEV, Physics Department, Technion-IIT, Haifa, Israel

Solid state devices based on mixed ionic electronic conductors (MIECs), mostly oxides, of the form metal1|MIEC|metal2 exhibit a variety of I-V relations. Of high most interest are those with rough shape of a (skewed) 8 under cyclic voltammetry (CV), with curve crossing at or close to the origin. The I-V relations may exhibit an abrupt change, switching. At low applied voltage under CV, hysteresis, changes with time in the I-V relations and negative resistance, are observed.
The I-V relations under the later conditions have been analyzed by us and fit experimental data. The I-V relations depend on boundary conditions: electrode work function, chemical surrounding and rate of material exchange at the electrodes. Any a-symmetry in the boundaries leads to an a-symmetry in the I-V relation, as also observed experimentally.
Switching requires a unique mechanism. One possibility is Joule heating and a thermal runaway combined with an exponential dependence of the ion mobility on temperature. This followed by cooling provides also means for a memory effect. We, on the other hand, examine a possible mechanism under constant temperature to see whether it can lead a) to switching and b) to memory. The discussion also refers to defect distributions and to the question of I-V curve crossing.

FM-1:L10  Bottom-up Fabrication of Metal-oxide-metal Nanowires with Controlled Resistive Switching Functionality
S. BRIVIO1, G. TALLARIDA1, D. PEREGO2, S. FRANZ2, S. SPIGA1, 1Laboratorio MDM, IMM-CNR, Agrate Brianza, Italy; 2Dipartimento di Chimica, Materiali ed Ing. Chimica "G.Natta", Politecnico di Milano, Milano, Italy

Resistive switching (RS), i.e. the voltage-driven resistance commutation of metal-insulator-metal structures, has been attracting large attention in the field of nanoelectronics for applications in non-volatile memory and logic. Conventional top-down manufacture processes are usually chosen to investigate RS at the nanoscale, while bottom-up solutions are occasionally found in literature.
Here we present the engineered RS functionality of 50nm-diameter metal-oxide-metal (MOM) nanowire arrays obtained with bottom-up fabrication procedure. Through conductive AFM, we tested the RS operation of MOM nanowires with symmetric and asymmetric couple of electrodes (Au,Ni) and different oxidation profiles of the NiO active segment. We demonstrated that symmetric nanowires display non-polar RS, i.e. only one voltage polarity is sufficient to complete entire switching cycles, while asymmetric nanowires show bipolar RS, i.e. both voltage polarities are needed. In addition, low-power operation down to few nW has been demonstrated for symmetric nanowires.
Finally, the RS behavior of the nanowires is correlated to the fabrication process as a first step of an engineering path of fully bottom-up solutions for RS memories.
This work was partly supported by Fondazione Cariplo (MORE Project 2009-27)

FM-1:L11  Two-terminal Non-volatile Memory Devices Using Silicon Nanowires as the Storage Medium
K. SARANTI, S. PAUL, Emerging Technologies Research Centre, De Montfort University, The Gateway, Leicester, UK

In the recent years an impressive progress in the miniaturisation of electronic devices has been achieved in which the main component that has shown great interest is the memory. However, miniaturisation is reaching its limit. Alternative materials, manufacturing equipment and architectures for storage devices are considered. In this work, an investigation on the suitability of silicon nanowires as the charge storage medium in two terminal non-volatile memory devices is presented. Silicon nanostructures have attracted attention due to their small size, interesting properties and their potential integration into electronic devices. The two terminal memory device, presented in this work, has a simple structure of silicon nanowires sandwiched between dielectric layers (Si3N4) on glass substrate with thermally evaporated aluminium bottom and top contacts. The silicon nanostructures and the dielectric layer were deposited by Plasma Enhanced Chemical Vapour Deposition (PECVD) technique. The electrical behaviour of the memory cell was examined by Current-Voltage (I-V), data retention time (Current-Time) and write-read-erase-read measurements. The memory effect is observed by the electrical bistability of the device that was able to switch between a high and a low conductivity state.

FM-1:L12  A New Ferroelectric RRAM with Fast Switching Speed and Extremely Long Endurance Compatible to DRAM
CHUN-HU CHENG, Department of Mechatronic Technology, National Taiwan Normal University, Taipei, Taiwan; ALBERT CHIN, Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan

The DRAM technology faces difficult challenges as down-scaling into deep 1X nm. This is due to the lacking of higher κ material and the continuously increased aspect ratio. Although the SrTiO3 dielectric has higher κ>100 than the currently used ZrO2 (κ~35), the smaller metal/insulator barrier height requires a thicker SrTiO3 that is opposite to the down-scaling trend of DRAM capacitor. Although the increasing capacitor's height can be used for DRAM scaling, the higher aspect ratio makes the DRAM process much more difficult. The high power consumption from the capacitor's leakage current is another limiting factor for multi-Gb DRAM. In this abstract, we propose and demonstrate experimentally a novel RRAM device: the measure data show extremely low off-state leakage current of <10 fA/μm, fast 5 ns switching time, no degradation after 1 Trillion endurance cycles, small 4F2 layout size, and a large ~100X memory window after 100 sec retention. This device can be used for embedded DRAM with orders of magnitude lower power consumption, much simpler process, and improved data retention time by 2~3 orders of magnitude than existing DRAM. This novel device was achieved by applying ferroelectric physics into device with full process compatibility to existing technology.

FM-1:L14  Block Copolymer Self Assembling for the Fabrication of Nanoscale HfO2 Resistive Switching Memories
J. FRASCAROLI1, 2, 3, S. BRIVIO1, F. FERRARESE LUPI1, F. VOLPE1, M. PEREGO1, L. BOARINO2, S. SPIGA1, 1Laboratorio MDM, IMM-CNR, Agrate Brianza, Italy; 2INRIM, NanoFacility, Division Electromagnetism, Torino, Italy; 3Università degli studi di Milano, Milano, Italy

Resistive switching phenomena in transition metal oxides have been recently widely studied for future ultra-scaled and high-density memory applications. A careful characterization of the device properties at the nanoscale requires a reproducible and controllable process for the definition of nanosized structures. The block copolymer-assisted lithography is compatible with current CMOS process technology and allows a good control over the defined features down to < 20 nm as a function of the polymer properties. In our work, we investigated the electrical properties of devices based on HfO2 and Al-doped HfO2 grown by atomic layer deposition. Large area µm-size top electrodes were defined by optical lithography, while for the nanoscale devices an ordered array of well-controlled Pt metal electrodes with a diameter of 20 nm was defined by block-copolymer assisted lift-off procedures. The switching properties were characterized as a function of material properties (Al-doping) and device area. The nanosized devices were electrically characterized using conductive AFM.

FM-1:L15  Resistive Switching in MIM-structures Based on HfxAl1-xOy and TiN both Grown by ALD
K.V. EGOROV, A.M. MARKEEV, YU.YU. LEBEDINSKII, A.V. ZABLOTSKIY, A.A. KUZIN, Moscow Institute of Physics and Technology, Dolgoprudny, Moscow Region, Russia

Recently it was shown a good performance of HfO2 based Pt-free MIM-stacks with oxygen vacancy engineering by Al or Ti doping during ALD process. For future 3-D integration of RRAM arrays it is favorable to use the ALD for metallic electrodes too (e.g. TiN). In this work we investigated TiN/HfxAl1-xOy/ TiN (ALD) stack with different Al depth profile. MIM-stacks at every growth stage were studied with in situ XPS for characterization of both chemical, electronic state and the dielectric fixed charge induced by oxygen vacancies. TiN/HfxAl1-xOy/ TiN (ALD) stacks were also characterized with TEM, XRD, XRR analysis. The influence of dielectric and TiN electrode growth parameters on RRAM cell performance was studied.
Session FM-2 - Phase Change Memories (PCM)

FM-2:IL01  The Impact of Disorder on Transport in Crystalline Phase Change Materials
M. WUTTIG, RWTH Aachen University of Technology, Aachen, Germany

Understanding charge transport in phase change materials is crucial to extend the application range of these exciting materials. The reduction of drift, i.e. the increase of the resistivity of the amorphous phase with time, for example, would facilitate the development of multilevel memories. Tailoring the transport of charge and heat in the crystalline state could help in reducing the power consumption upon amorphization. With this goal in mind we have studied the resistivity and the thermal transport of crystalline phase change materials. A pronounced dependence of the room temperature resistivity upon annealing temperature is observed for crystalline phase change materials such as Ge1Sb2Te4 or Ge2Sb2Te5. This finding is corroborated by low temperature measurements as well as FTIR data, which confirm that a metal - insulator transition is observed without a change in crystallographic state. This is indicative for an electronically driven MIT. A similar transition is also observed for the thermal conductivity.
Such an MIT can be achieved if the electron correlation exceeds a critical value (Mott MIT). A second route to insulating behavior has been identified by Anderson, which provides a consistent explanation of our data.

FM-2:IL02  Neural Network Simulation of Phase Change Materials: Handling Large Models with DFT Accuracy
G.C. SOSSO, S. GABARDI, G. MICELI, S. CARAVATI, M. BERNASCONI, Department of Materials Science, University of Milano-Bicocca, Milano, Italy; J. BEHLER, Lehrstuhl fuer Theoretische Chemie, Ruhr-Universitaet, Bochum, Germany

In the last few years atomistic simulations based on density functional theory (DFT) have provided useful insights on the properties of chalcogenide alloys of interest for phase change memories (PCM). Still, large simulation cells and long simulation times beyond the reach of fully DFT simulations are needed to address several key issues of relevance for PCM performances. To overcome these limitations, we have developed an interatomic potential for the prototypical phase change compound GeTe by fitting a large DFT database with a neural network (NN) scheme. Large scale NN simulations allowed us to get insights on the thermal transport properties of the amorphous phase and on the fragility of the supercooled liquid. In this talk, we will present the results of NN simulations on the dynamics of homogeneous and heterogeneous crystallization of GeTe that allowed us to compute the crystallization speed as a function of temperature and to identify the origin of dynamical heterogeneities leading to a breakdown of the Stokes-Einstein relation between viscosity and atomic mobility. We will also analyse the structural relaxations leading to a drift in the electronic resistance of the amorphous phase which is a particularly critical issue for PCM operation.

FM-2:L03  TEM Study of the Low Resistance State in GST Ge Rich & N Doped PRAM Devices
M. COUE'1, G. NAVARRO1, V. SOUSA1, V. DELAYE1, L. PERNIOLA1, N. BERNIER1, P. NOÉ1, F. FILLOT1, C. SABBIONE1, D. BLACHIER1, P. ZULIANI2, R. ANNUNZIATA2, G. REIMBOLD1, 1CEA, LETI, MINATEC Campus, Grenoble Cedex, France; 2STMicroelectronics, Technology R&D, Agrate Brianza, Italy

In this study we investigate the electrical characteristics of Ge-enriched GST Phase-Change Memories devices doped with nitrogen, and link their electrical performances (SET-RESET currents, data retention & drift) to their physico-chemical properties observed through TEM analysis such as EELS cartography and diffraction patterns. In particular, we focus on the peculiar behaviors of GST-Ge45%-N4% in the SET state, providing for the first time a full insight of working devices integrating this specific material which has drawn a lot of attention recently thanks to its excellent trade-off between data retention and SET-RESET performances.
A specific procedure of electrical pulses is applied to the cells to obtain a so-called SETMIN state which exhibits a lower resistance than the standard SET resistance, allowing the devices to sustain high temperatures soldering reflows in this low resistance state. The stability demonstrated through electrical characterizations of this SETMIN state is then correlated to the physico-chemical changes of structures and composition of the devices through TEM studies, allowing a better understanding of the processes involved.

FM-2:IL06  Chalcogenide Nanowires for Highly-scaled Phase Change Memories: from Synthesis to Functional Analysis
M. LONGO, Laboratorio MDM, IMM-CNR, Agrate Brianza, Italy

Different strategies can be exploited to downscale the Phase Change Memories (PCM) and improve their performances; phase change nanowires (PC-NWs) are a very promising option for ultra-scaled PCM nanocells.
Approaches for the fabrication of PC-NWs based on chalcogenide materials will be illustrated and discussed, along with the functional analysis, from the use of top-down techniques, such as electron beam lithography, to bottom-up techniques, such as self assembly of NWs by chemical vapor deposition methods (CVD). A special attention will be devoted to the synthesis and analysis of PC-NWs realized by the vapor-liquid-solid (VLS) mechanism, realized in different CVD reactors. In particular, significant results obtained at MDM will be illustrated for NWs self assembled by metalorganic chemical vapor deposition (MOCVD) and VLS, formed by GeTe, Ge1Sb2Te4, Ge2Sb2Te5, Ge-doped Sb-Te and Sb2Te3. In this case, compositional and structural analyses are coupled to the electrical analysis to provide a panorama of the NW growth mode and phase change properties. A comparative discussion of the functional properties of the NW-based PCM cells will be finally illustrated, also comparing with the performances of current planar PCM devices.
The FP7 SYNAPSE Project (# 310339) is acknowledged.

FM-2:L07  Thermal Characterization of In-Sb-Te Thin Film
H.T. NGUYEN, A. KUSIAK, J.L. BATTAGLIA, Laboratoire I2M, UMR 8508, Université Bordeaux 1, Talence Cedex, France; R. FALLICA, C. WIEMER, T. STOYCHEVA, M. LONGO, Laboratorio MDM, CNR-IMM, Agrate Brianza (MB), Italy

Phase change memories (PCM) are often based on compounds of Ge-Sb-Te (GST) ternary system. However, a major limitation of PCM devices based on GST is the low crystallization temperature, which prevents the fulfillment of automotive-level or military-grade requirements (125°C continuous operation). To enhance this limitation, the In-Sb-Te (IST) system has been proposed, which have demonstrated high crystallization temperature, fast switching, and multilevel capability. Indeed, thermal characteristics of the chalcogenide material and of its interfaces within the PCM cell influence programming current, reliability and optimized scaling of PCM devices. In this study, we used the modulated photothermal radiometry to measure the IST films thermal conductivity as well as the thermal interface resistance with other surrounding materials. IST thin films were deposited on a Si substrates covered by MOCVD with thermal SiO2 at the interface and a Pt layer that acts as an optical and thermal transducer. Two different compositions for the IST were investigated. Additional data from Raman and XRD allowed to better analyzing the temperature dependent thermal properties measurements. Finally, a model for the temperature dependent thermal properties was proposed that confirms the observed trends.

FM-2:L08  Temperature Dependent Thermal Conductivity of a GeSbTe Nanowire
A. SACI, J.-L. BATTAGLIA; M. LONGO, R. FALLICA, C. WIEMER, Laboratoire I2M, UMR 8508, Université Bordeaux 1, Talence Cedex, France, with Laboratorio MDM, CNR-IMM, Agrate Brianza (MB), Italy

A scaling opportunity of phase change memory (PCM) devices is offered by the use of phase change nanowires(NW).Ge-Sb-Te NWs were grown by Metalorganic Chemical Vapor Deposition (MOCVD), and their electrical and structural properties were characterized. However, little is known on the thermal properties of chalcogenide NWS, which might influence their performances as PCM devices. Fast change has been experienced and electrical reversible change has been demonstrated from temperature change of the NW.The goal of the present study was to measure the temperature dependent thermal conductivity of a single, MOCVD-grown, GST NW. This operation is very delicate, due to the NW size (diameter≈200nm,length≈2µm).Therefore, we implemented a Scanning Thermal Microscopy (SThM) technique based on an AFM with a 50 nm spatial resolution. The method is based on the classical 3-omega technique, adapted to the AFM tip and requires very high accuracy all over the temperature range. The thermal resistance of the NW was deduced from the absolute temperature field measurement. Finally, a model was developed that allows to relate the NW thermal conductivity to the measured thermal resistance. This operation was repeated for different temperatures of the NW, in order to follow the variation of the thermal conductivity through the phase change process.

FM-2:IL09  Phase Change Memory Nano-scale Evolution
R. BEZ, A. PIROVANO, Micron, Agrate Brianza, Italy

Phase Change Memory (PCM) provides a set of features interesting for novel applications, combining features of NVM and DRAM and being at the same time a sustaining and a disruptive technology. From application point of view, PCM can be exploited by all the memory systems, especially the ones resulting from the convergence of consumer, computer and communication electronics.
Aim of this presentation is to review the PCM technology status and to discuss in specific the scaling perspective and challenges for a memory technology in the nanoscale storage.

FM-2:IL10  Spin Control and Storage using [(GeTe)x/(Sb2Te3)y]z Interfacial Phase Change Memory
J. TOMINAGA, Y. SAITO, K. MAKINO, X. WANG, A. KOLOBOV, P. FONS, T. NAKANO, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan; S. MURAKAMI, Tokyo Institute of Technology, Meguro, Tokyo, Japan; H. AWANO, Toyota Technological Institute, Nagoya, Japan; M. HASE, Tsukuba University, Tsukuba, Japan; Y. Takagaki, Paul-Drude Institute, Berlin, Germany

Interfacial phase change memory (iPCM), in which the phase transition occurs between one crystalline phase and another, has attracted increasing attention as a new-type of phase change memory (PCM) because of smaller switching energy, better durability in Set & Reset and magnetic property related to topological insulator (TI). Since the first iPCM demonstration using a conventional PCM test platform, the energy consumption has not only been decreased by <1/30, but also electrical-induced magneto-resistance more than 2000% was observed at room temperature. The mechanism of the magnetism from the magnetic-dopant free [(GeTe)x/(Sb2Te3)y]z (x, y and z are integer) structure has intensively been studied since then. Recently, we discovered that at room temperature the magnetism appears only when an electrical current flows, while at a high temperature (≲ 400K) it comes out even when the current is switched off. Based on the iPCM switching model, therefore, it is speculated that the SET-crystalline phase is ferromagnetic while the RESET phase is not. As the both phases are crystalline, it is clear that the origin of the magnetism relays on the atomic locations in between the two phases. We reveal and discuss about the detailed mechanism in the presentation.

FM-2:L11  Structural and Electrical Properties of [(SiTe)x/(Sb2Te3)y]z Interfacial Phase Change Memory
Y. SAITO, J. TOMINAGA, K. MAKINO, X. WANG, A. KOLOBOV, P. FONS, T. NAKANO, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan

Interfacial phase change memory (iPCM) was reported using GeTe/Sb2Te3 superlattice structure and showed about 1/30 power consumption compared with conventional phase change memory in 2011. Besides iPCM demonstrated electrical-induced magneto-resistance effect more than 2000% in spite of using only non-magnetic elements. Although the iPCM has been attracting considerable attention as both electrical non-volatile memory and magnetic device, the material research has not yet been carried out sufficiently. We report the structural and electrical properties of [(SiTe)x/(Sb2Te3)y]z (x, y and z are integer) structure films. Ab initio first principle calculation revealed that (SiTe)2/(Sb2Te3)n (n: 1,2,4 and 6) structures could stably exist. We made (SiTe)2/(Sb2Te3)4 structure film on Si single crystal by RF-magnetron sputtering. XRD and TEM showed that (SiTe)2/(Sb2Te3)4 structure films had highly oriented of 001 plane perpendicular to the substrate. We also discuss the relationship between atomic alignment of superlattice and band structure, and electrical properties of [(SiTe)x/(Sb2Te3)y]z film.

Session FM-3 - Magnetic, Ferroelectric and Multiferroic Materials for Memory Devices

FM-3:IL01  Current Status and Prospects of Magnetoresistive Random Access Memory Technology
H. OHNO, Center for Spintronics Integrated Systems, Tohoku University, Japan, Laboratory for Nanoelectronics and Spintronics Research Institute of Electrical Communication, Tohoku University, Japan, WPI-Advanced Institute for Materials Research, Tohoku University, Japan

Magnetoresistive random access memory (MRAM) technology is reviewed with the emphasis on magnetic tunnel junction (MTJ), a nonvolatile spintronics device, which can be embedded in the back-end of CMOS VLSIs and thus opens a wide variety of opportunities not limited to MRAM [1]. Following an early work on 40 nm-diameter MgO-CoFeB MTJs [2], one can now achieve a thermal stability factor E/kBT of 59 and tunnel magnetoresistance ratio of 89 % in a double MgO barrier MgO-CoFeB MTJ at 29 nm in diameter [3]. Judging from the magnitude of the interface perpendicular anisotropy at the MgO-CoFeB interface, one should be able to increase E/kBT further by increasing the thickness of CoFeB [4], which allows us to reach below 20 nm in device diameter. The future prospects of the technology in terms of materials science and physics is then addressed in order to reach below 10 nm.
This work was supported by the FIRST program from JSPS.
[1] H. Ohno, et al. IEDM (invited) 2010.
[2] S. Ikeda, et al. Nature Materials, 9, 721 (2010).
[3] H. Sato, et al. IEEE Trans. Mag. 49, 4437 (2013).
[4] H. Sato, et al. IEEE Magn. Lett. 3, 3000204 (2012).

FM-3:IL02  On the Origin of Ferroelectric Resistive Switching in BiFeO3 Thin Films
S. FAROKHIPOOR, B. NOHEDA, Zernike Institute for Advanced Materials, University of Groningen, Groningen, The Netherlands

A ferroelectric between two metal electrodes can experience changes in resistance up to three orders of magnitude upon polarization reversal. Already in 1994, Blom et al. showed that the ferroelectric Schottky diode concept proposed by Esaki two decades earlier, worked on a 200nm film of PbTiO3 with a Schottky Au contact[1]. An on/off ratio of two orders of magnitude was then found. More recently an even greater change in resistance has been reported for BiFeO3[2,3]. Different mechanisms have been proposed for this behavior without general consensus. By measuring locally the conductivity in differently polarized domains and at domain walls, as a function of bias and temperature in air, it is possible to extract the mechanisms of conduction under realistic working condition, as well as the relative importance of the polarization bound charges and the screening charges to determine the conduction level. It is concluded that the change in the height of the barrier for injection of electrons from the electrode into the BiFeO3 film, as well as the change in screening efficiency are the main factors determining the change in resistance through the device.
[1] Blom et al., PRL 73, , 2107 (1994)
[2] Choi et al. Science 324, 63 (2009).
[3] Jiang et al. Adv. Mat. 23, 1277 (2011)

FM-3:IL03  Ferroelectric Memories based on Resistive Switching
A. GRUVERMAN, Department of Physics and Astronomy, University of Nebraska-Lincoln, Lincoln, NE, USA

Currently available ferroelectric random access memories utilize a destructive read process of information, which requires the memory cells to be re-written by a relatively high voltage. An alternative approach is based on the polarization-driven resistive switching, known as the tunneling electroresistance (TER) effect. By flipping polarization of the ultrathin ferroelectric barrier it is possible to change an internal electronic potential profile and alter the transmission probability of tunneling electrons. Using this effect, reading of the polarization state can be performed in a non-destructive manner by measuring the resistance of the memory cell. In addition to being relevant to technological applications, the TER effect concerns the fundamental issues of the critical behavior and switching dynamics in ultrathin ferroelectric films, role of structural defects and interfacial properties in the transport behavior. This talk will focus on investigation of the relationship between retention of ferroelectric polarization and related electronic transport behavior in high-quality single-crystalline BaTiO3 tunnel junctions. Several approaches to enhance retention and magnitude of the TER effect as well as to realize tunable resistive behavior will be discussed.

FM-3:IL04  Recent Developments in Manipulating Domain Wall Motion in Wires with Perpendicular Anisotropy
D. RAVELOSONA, CNRS/Université Paris Sud, Orsay, France

One crucial breakthrough in spin electronics has recently been achieved regarding the possibility to move magnetic domain walls (DWs) in magnetic tracks using the sole action of an electrical current instead of a conventional magnetic field. This important discovery has opened a perspective for a paradigm shift in mass storage design or logic devices. Here, I will present our recent results of DW dynamics obtained in Ta-CoFeB-MgO nanodevices with perpendicular magnetic anisotropy and discuss the critical problems to be addressed for implementation into a memory device. Particularly, we have devised a method based on a scanning nitrogen-vacancy center microscope to map DW pinning sites along a magnetic wire. We have demonstrated a very low density of pinning center that is consistent with very low propagation fields. I will also show that He ion irradiation can be used to control locally in a very precise way domain wall pinning with high thermal stability. Finally, I will describe our recent experiments of domain wall motion under polarized current and electric field.

FM-3:IL05  Ultimate Scalability of MRAMs and Logic Functionalities
I.L. PREJBEANU1, R.C. SOUSA1, B. DIENY1, J.-P. NOZIERES1, S. BANDIERA2, L. LOMBARD2, Q. STAINER2, K. MACKAY2, 1SPINTEC, UMR8191 CEA/DSM/INAC-CNRS-UJF, Grenoble, France; 2Crocus Technology, Grenoble, France

MRAM is now viewed again as a credible replacement to existing technologies for applications where the combination of non-volatility, speed and endurance is key. A recent report from ITRS ERD/ERM working group has identified STT MRAM as one of the most promising candidates for emerging scalable and manufacturable non-volatile memories. In this paper, we show how thermal assistance can be implemented in field induced switched MTJ to enhance the reliability and the scalability of MRAM. A new self-referenced reading scheme can be implemented in such MTJ in order to obtain a Magnetic Logic Unit that present new logic functionalities compared to standard MRAM. In a second time, I will present the implementation of thermal assistance in MTJ with current induced switching writing scheme. In that case, no field line is required, increasing thus the storage capacity of MRAM cell and decreasing the writing consumption while keeping a satisfying data retention capacity. Ultimately, thermal assistance can be implemented in MTJ with perpendicular magnetization. In that case, thermally induced anisotropy reorientation can be used to decrease the switching power consumption, increase the writing reliability and improve further the scalability of TA-MRAM down to 22nm technological node.

FM-3:IL06  Doped Hafnium Oxide - An Enabler for Ferroelectric Field Effect Transistors
T. MIKOLAJICK1, 2, U. SCHROEDER1, J. MÜLLER3, S. MÜLLER1, T. SCHENK1, E. YURCHUK1, S. SLESAZECK1, 1NaMLab GmbH, Dresden, Germany; 2Institut für Halbleiter und Mikrosystemtechnik, TU Dresden, Dresden, Germany; 3Fraunhofer Center Nanoelectronic Technologies, Dresden, Germany

Ferroelectrics are very interesting for nonvolatile memories. The progress is limited by the low compatibility of conventional ferroelectrics like PZT with CMOS processing. Therefore 1T/1C ferroelectric memories are not scaling below 130 nm and 1T ferroelectric FETs are still struggling with low retention and very thick memory stacks [1]. Hafnium oxide, a standard material in sub 45nm CMOS, can show ferroelectric hysteresis with promising characteristics [2]. By adding a few percent of silicon and annealing the films in a mechanically confined manner Boescke et al. demonstrated ferroelectric hysteresis in hafnium oxide for the first time. Recently a large number of dopants including Y, Al, Gd and Sr have been used to induce ferroelectricity in HfO2. In the first part of this talk the different doping elements that have been shown to enable ferroelectricity will be compared and general trends will be established. The second part will focus on the memory relevant characterization data. Finally the application in 1T FETs will be demonstrated and the potential to solve principal issues of ferroelectric FETs will be illustrated.
[1] L.V.Hai et al., Prodeedings of IEEE International Memory Workshop, 2011
[2] T. S. Böscke et. al., Appl. Phys. Lett., vol. 99, p. 102903, 2011

FM-3:L07  Integration of STT-MRAM for Embedded Cache Memory
T. SUGII, Y. IBA, M. AOKI, H. NOSHIRO, K. TSUNODA, A. HATADA, M. NAKABAYASHI, Y. YAMAZAKI, A. TAKAHASHI, C. YOSHIDA, Low-power Electronics Association & Project (LEAP), Tsukuba, Ibaraki, Japan

We report the current status of our spin-transfer torque magnetic RAM (STT-MRAM) development and its integration with the BEOL process for replacing conventional embedded SRAM cache memory.
Our MRAM technology features a top-pinned, perpendicular magnetic tunnel junction (MTJ) and a highly reliable MTJ for a cache memory. They are integrated into Cu interconnects with 300 mm facilities.
For high density, it is necessary to reduce an area of the MOSFET which drives the MTJ. In our top-pinned structure, the pinned layer is deposited above the MgO tunnel barrier, which is in contrast to the conventional bottom-pinned one. Owing to the structure, the MTJs are able to smoothly switch from parallel to anti-parallel state and back using MOSFETs with small area.
From the point of high density embedded cache memory, we will discuss variations in electric characteristics which are very important for memory applications.
We will also discuss what we can get by replacing a conventional embedded SRAM with our STT-MRAM. With our STT-MRAM, we can get 6 times higher density cache memory compared with SRAM and leakage free characteristics, as well as unlimited write and read cycling times and 10-years TDDB characteristic.

FM-3:L09  Integration of Ferromagnetic and Ferroelectric Oxides on Semiconductors
A.A. DEMKOV1, A.B. POSADAS1, P. PONATH, M. CHOI, H. SEO, K. FREDRICKSON, R. HATCH, D.J. SMITH2, M.R.  MCCARTENTY2, 1Department of Physics, The University of Texas, Austin, TX, USA; 2Department of Physics, Arizona State University, Tempe, AZ, USA

Over a decade ago, McKee and co-workers achieved a breakthrough in the direct epitaxial growth of single crystal perovskite SrTiO3 on Si(001). The ensuing development of crystalline epitaxial oxides on semiconductors has ushered in a tantalizing possibility of growing functional oxide nanostructures utilizing non-volatile properties such as ferroelectricity and ferromagnetism, in monolithic integration with Si and other semiconductors. This is a relatively new area with equal measure of exciting possibilities and difficult challenges. Among the fundamental aspects of monolithic integration are the crystal growth of functional oxides on semiconductors and semiconductors on oxide surfaces, and the tunability of their electronic and transport properties.
In this talk I will describe our recent efforts on integration of ferroic oxides on semiconductors using a SrTiO3 (STO) buffer. I will discuss the integration of ferromagnetic LaCoO3 and Co-doped SrTiO3 on Si (001) and ferroelectric BaTiO3 on Si (001) and Ge (001) using molecular beam epitaxy (MBE). We employ first principles modeling to both guide the crystal growth and analyze the characterization data. In particular, by modeling core level spectroscopy and comparing with the x-ray photoemission data we are able to identify the Zintl growth template for STO on Si and Ge. Comparing theoretical spectral functions with the angel resolved photoemission spectra (ARPES), provides us with a better understanding of the SrTiO3 buffer surface. We demonstrate that tensile strain stabilizes ferromagnetism in LaCoO3 grown on Si, and. We also demonstrate that a cobalt-vacancy complex results in room temperature ferromagnetism in Co-doped STO on Si. Using the same strategy we stabilized ferroelectric state with out-of-plane polarization in BaTiO3 (BTO) grown on Si with an STO buffer. And we demonstrate BTO growth on Ge (001). Annular dark field microscopy is used to elucidate the atomic structure of the semiconductor/oxide interface that is used in subsequent first principles calculations of the band alignment at the interface. The calculated band offset is in excellent agreement with that inferred from photoemission.
This work is supported by the Air Force Office of Scientific Research under grant FA9550-12-10494, Office of Naval Research (ONR) under grant N000 14-10-1-0489, National Science Foundation under grant DMR-1207342, and Texas Advanced Computing Center. We gratefully acknowledge the use of facilities in the John M. Cowley Center for High Resolution Electron Microscopy at Arizona State University.

Session FM-4 - Memristive Materials, Devices and Emerging Applications

FM-4:IL01  Phase-change Memories, Memristors and Memflectors
C.D. WRIGHT, P. HOSSEINI, Department of Engineering, University of Exeter, Exeter, UK

Phase-change materials exhibit some remarkable properties. They can be crystallized in picoseconds and amorphized in femtoseconds, but remain stable against spontaneous crystallization for many years. They exhibit huge differences in optical and electrical properties between the amorphous and crystalline phases. Such properties have led to the successful development of both optical and binary non-volatile phase-change memories. However, binary memory is only one of a remarkable range of important and exciting potential applications that phase-change materials and devices might offer. Such applications extend to arithmetic processing, logic processing, 'brain-like' or neuromorphic computing and even all-optical computing and photonic memories. In this paper we point out the origin, in terms of materials properties, of some of these new and exciting applications and discuss possible routes to their implementation.

FM-4:IL02  Novel Functions Achieved by Atom/Ion Movement Controlled Devices
T. HASEGAWA, M. AONO, WPI Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS), Tsukuba, Japan

Emerging devices have a potential to achieve neuromorphic functions, necessary in developments of neuro-computers. Major functional components of neuro-computers are neurons and synapses. Recently, synaptic function has been demonstrated using various nonvolatile devices, such as ReRAMs, phase change memories, ferroelectric devices, and MRAMs. In this talk, I will focus on the synaptic functions achieved by atom-movement control device, 'Atomic Switch', which we developed about ten years ago. An atomic switch is a nanoionic-device that controls the diffusion of metal ions/atoms and their reduction/oxidation processes in the switching operation to form/annihilate a conductive path. The unique operating mechanism has enabled the development of various functions those can be used in developments of neuro-computers, such as selective volatile/nonvolatile switching depending on an operating bias range, memristive, and photo-assisted operations in addition to the synaptic function. These functions are introduced with their operating mechanisms.

FM-4:L03  Study of Memristive Switching Effects in MIM-stacks with the Graded Functional Layer
YU. MATVEYEV, YU. LEBEDINSKII, A. MARKEEV, K. EGOROV, Moscow Institute of Physics and Technology, Moscow region, Russia; A. ZENKEVICH, National Research Center "Kurchatov Institute", Moscow, Russia

It has been recently shown that memory cells with multibit resistance switching states (memristors) are functionally similar to biological synapses. One of the approaches to create a MIM-stack with a stable gradual reversible switching is to grow a functional layer with a graded composition profile which sets the necessary profile of defects across the layer without using an electroforming process. In this work, we present a systematic study of two different systems based on HfxAl1-xOy and a-Si:Au functional layers grown by Atomic Layer Deposition and Pulsed Laser Deposition, respectively. The chemical and structural properties of the corresponding MIM stacks comprising different electrodes are correlated with the comprehensive electrical characterization. The revealed properties of memristors with graded functional layers including spike-time dependent plasticity and paired pulse facilitation tests will be presented.

FM-4:L04  BiFeO3 Bilayer Structures for Implementing beyond Von-Neumann Computing
TIANGUI YOU, NAN DU, D. BÜRGER, I. SKORUPA, O.G. SCHMIDT, H. SCHMIDT, Material Systems for Nanoelectronics, Chemnitz University of Technology, Chemnitz, Germany; YAO SHUAI, WENBO LUO, State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China; S. HENKER, C. MAYR, R. SCHÜFFNY, Faculty of Electrical Engineering and Information Technology, Institute of Circuits and Systems, Technische Universität Dresden, Dresden, Germany; T. MIKOLAJICK, NaMLab gGmbH, Dresden, Germany

The conventional von-Neumann architecture, which physically separates processing and memory operations, is limited in so much as the processor cannot execute a program faster than instructions and data can be fetched from and returned to memory, leading to the well known von-Neumann bottleneck. Resistive switching devices are considered as one of the most promising candidates for the nonvolatile logic applications, which can carry out the processing and storage simultaneously and at the same device cell to overcome the von-Neumann bottleneck. In this work, we present a BiFeO3:Ti/BiFeO3 bilayer structure which shows stable and nonvolatile resistive switching behaviour under both positive and negative bias. With the same writing bias, the bilayer structure shows different resistance state for the different polarity of reading bias. The resistance states are distinguishable and stable enough for the practical applications. For the logic applications, the polarity of reading bias can be used as an additional logic variable, which makes it feasible to program and store all 16 Boolean logic functions simultaneously and into a same single bilayer structure cell in three logic cycles, promising a most efficient and effective means for implementing beyond von-Neumann computing.

FM-4:L05  Amorphous In-Ga-Zn-O Thin-Film-Transistor Memory Devices for System-on-Panel Applications
SHI-JIN DING, XING-MEI CUI, SUN CHEN, School of Microelectronics, Fudan University, Shanghai, China

Recently, amorphous In-Ga-Zn-O (a-IGZO) has been intensely studied as a channel material in thin-film transistors (TFTs) for flat, flexible, transparent display applications. Further, to develop a fully functional transparent system on a panel, nonvolatile a-IGZO TFT memory devices have been proposed because it can be easily integrated into displays and flexible electronic devices. In this work, the a-IGZO TFT memory was fabricated using Pt nanocrystals (NCs) as the charge storage medium. For temperature compatibility with the standard TFT process, low-temperature atomic-layer-deposition was used to prepare the entire Al2O3/Pt NCs/Al2O3 gate stack in one chamber without vacuum breakage. To overcome the strong immunity to electrical erase for a-IGZO TFT memories because of the lack of holes in the channel, UV light was used to erase the programmed device without biasing. A positive threshold voltage (Vth) shift of 2.25 V is achieved after 1 ms programming at 10 V, while a negative Vth shift as large as 3.48 V relative to the fresh state is attained after 5-s UV erase. Moreover, a ten-year memory window of 2.56 V is extrapolated at room temperature. Meanwhile, a stable memory window of ~3.3V is well demonstrated after 40 P/E cycles under +15V/1ms programming and 1s UV erasing.

FM-4:IL06  Memristor Memory: a Fundamentally New Opportunity
J.H. NICKEL, J.J. YANG, J.P. STRACHAN, G. SNIDER, R.S. WILLIAMS, Hewlett Packard Laboratories, Palo Alto, CA, USA

Memristors, the fourth fundamental circuit element, provides a new dimension to modern electronics. Predicted in the early 1970's, memristive behavior has been shown in multivalent oxides and proposed as the mechanism in other materials systems. The distinguishing characteristic of memristors is the presence of a state variable which modulates the device characteristics.
The ability to modulate device characteristics opens the door to a new generation of electronic devices. Early manifestations will be fast, scalable memory, currently under development. Integration with compute devices will accelerate computing power while reducing power requirements. Analogue operation will create new functionality, including neuromorphic behavior.
This talk will explore the fundamental difference in memristive device behavior, identify the state variables in two different systems, update progress in developing memristive memory, and discuss opportunities awaiting the future.

FM-4:IL07  Nanodevices for Bio-inspired Computing: Memristors & More
J. GROLLIER et al, CNRS/Thales, Palaiseau, France

Thanks to the progress in Nanotechnologies and Material Science, physicists and condensed matter scientists have recently been able to build smart nano-devices with enhanced capabilities. Some of these new devices show functionalities that could be extremely interesting for bio-inspired computing. It has been demonstrated for example that some analog and tunable nano-resistors called Memristors can mimic synapses on silicon. The industry is already developing dense networks of these nano-devices for classical digital memories. It is therefore no longer a dream to envisage building bio-inspired chips based on large-scale, high density parallel networks of these advanced devices, and taking advantage of their full functionalities. What's more, the inherent qualities of massively parallel architectures : the speed, the tolerance to defects and the low power consumption are more and more appreciated these days when computer processors are heating so much that they cannot be used at all times, and when transistors are shrinking so much that they will no longer be reliable. It is becoming a common thesis that bio-inspired chips such as Artificial Neural Networks will soon enter the market as a back-up or accelerator of more traditional computing architectures.
In this talk I will review the state of the art of memristors nano-devices and their applications. I will then focus on our work: the development of a new generation of memristors, based on purely electronic effects, the ferroelectric and spin torque memristors. I will show that, by tuning interface properties and finely engineering the dynamics of ferroelectric polarization or magnetization, we can control the response of these memristors. In particular, I will expose how, thanks to the versatility of our spintronic nano-devices, we can implement at the nano-scale a variety of functions that could be the future building blocks of high performance, low power, bio-inspired hardware.

FM-4:IL08  Tunnel Junction Based Memristors for Neuromorphic Processing
A. THOMAS, Bielefeld University and Mainz University, Germany

Memristors have attracted great interest for a variety of applications in recent years. An obvious use would be as a memory device or, more ambitiously, a reconfigurable logic device. However, the most interesting implementation of memristive devices is neuromorphic computing [1].
A possible realization of a memristive device is a metal-insulator-metal structure. In particular, this can be a tunnel junction. Then, a 1-3nm thin insulator separates two metal electrodes and the tunneling current is determined while the bias voltage is applied. We prepared magnesia, tantalum oxide, vanadium oxide and barium titanate based junction structures and measured the memristive properties.
Utilizing these properties, we looked into the use of the junction structures. We observed analogs of long term potentiation, long term depression and spike time dependent plasticity in these primitive two terminal devices [2]. The scalability of (magnetic) tunnel junctions was already shown in magnetic random access memory devices, therefore, we suggest the use of memristive tunnel junctions as artificial synapses in neuromorphic circuits.
[1] A. Thomas, J. Phys. D 46 (2013) 093001
[2] P. Krzysteczko et al., Adv. Mat. 24 (2012) 762

FM-4:IL09  Neuromorphic Computing with Memristive Circuits
D.B. STRUKOV, Electrical and Computer Engineering Department, University of California at Santa Barbara, Santa Barbara, CA, USA

I will present recent experimental results on pattern classification and recognition tasks implemented with Pt/TiO2-x/Pt memristive [1] neural networks. In particular, I will first discuss demonstration of pattern classification task for 3×3 binary images by a single-layer perceptron network implemented with 10 x 2 memristive crossbar circuits in which synaptic weights are realized with memristive devices [2]. I will then present experimental demonstration of pattern recognition task, in particular that of 4-bit analog-to-digital conversion (ADC) operation implemented with Hopfield recurrent neural network [3]. In this work the memristors are tuned precisely to the values described in the original Hopfield work using the developed algorithm [4]. Although the considered circuits are simple and hardly practical by itself, the established work presents a proof-of-concept demonstration for highly anticipated memristor-based artificial neural networks and paves the way for extremely dense, high-performance information processing systems.
[1] J.J. Yang et al, Nature Nanotechnology 8 (2013) 13-24.
[2] F. Alibart et al., Nature Communications, (2013) 25th June.
[3] L. Gao et al., in: Proc. NanoArch'13 (2013).
[4] F. Alibart et al., Nanotechnology 23 (2012) 075201.

Poster Presentations

FM:P02  Extraction of Filament Properties in Resistive Random Access Memory (ReRAM) Consisting of Binary-transition-metal-oxides
T. MORIYAMA1, R. KOISHI1, K. KIMURA1, S. KISHIDA1, 2, K. KINOSHITA1, 2, 1Tottori University, Koyama-Minami, Tottori, Japan; 2Tottori University Electronic Display Research Center, Koyama-Kita, Japan

For high speed switching of resistive random access memory (ReRAM), we must elucidate a dominant parameter of controlling switching speed. In particular, reset switching time (treset) disperses ranging widely from 1 us to 1 ms even in the same ReRAM element. Since treset is not necessarily determined by only one parameter, it is important to get reset parameters which are expected to be related to treset, low resistance (RL), reset voltage (Vreset) and reset temperature (Treset).
In this study, we investigated RL-, Vreset-, and Treset-dependences of treset by extracting these parameters at the same time by combining the measurements of pulse response and the T-dependence of RL for Pt/NiO/Pt-ReRAMs. In the former experiment, pulse width was increased from 10 ns to 10 ms by one digit until reset occurred, whereas the pulse height was fixed to 0.60 V. As a result, treset decreased with increasing Vreset and/or Treset, suggesting that Vreset and/or Treset accelerate reset switching. Since resistive switching was occurred in a unipolar mode, the thermal diffusion and electric field drift (EFD) of oxygen ions are competing against each other in the reset process. Therefore, the increase of Treset caused by that of Vreset is suggested to be more dominant than the increase of EFD itself.

FM:P04  Analysis of Resistive Switching Effect Induced by Hydrogen Introduction Using X-ray Absorption Fine Structure
A. HANADA1, H. MIURA1, T. NOTSU1, H. OSAWA2, T. INA2, M. SUZUKI2, N. KAWAMURA2, M. MIZUMAKI2, T. URUGA2, S. KISHIDA1, 3, K. KINOSHITA1, 3, 1Tottori University, Koyama-Minami, Tottori, Japan; 2JASRI / SPring-8, Hyogo, Japan; 3Tottori University Electronic Display Research Center, Koyama-Minami, Tottori, Japan

We investigated the electronic state of perovskite-oxide-based resistive random access memory (ReRAM) consisting of Bi2Sr2CaCu2O8+d (Bi-2212) bulk single crystal for the elucidation of resistive switching mechanism by using X-ray absorption fine structure (XAFS) measurement (BL39XU of the SPring-8, Japan). Hydrogen ions were effectively introduced into the Pt electrode/Bi-2212 structure with the assistance of a Pt catalyst, and resistive switching effect was brought about in the interface between the Pt and the Bi-2212. An XAFS profile showed that the development of the resistive switching effect was accompanied with decrease in the formal Cu valence of the Bi-2212 under the Pt electrode. Therefore, we clarified that the development of the resistive switching phenomenon in perovskite oxide-based ReRAM was caused by the strong reduction of transition metal oxide layer due to introduction of hydrogen ions with the assistance of Pt catalytic effect.

FM:P05  Elucidation of Metal Diffusion Mechanism in Conducting-Bridge Random Access Memory (CB-RAM) Using First-principle Calculation
K. KINOSHITA1, 2, S. YURA1, T. YAMASAKI3, K. NAKADA1, A. ISHII1, S. KISHIDA1, 2, 1Tottori University, Koyama-Minami, Tottori, Japan; 2Tottori University Electronic Display Research Center, Koyama-Kita, Japan; 3National Institute for Materials Science, Sengen, Ibaraki, Japan

The specification of the Cu diffusion path in the oxide layer of a Cu/oxide/Pt-structured conducting-bridge random access memory (CB-RAM) and the elucidation of the Cu diffusion mechanism are important, in terms of both clarifying resistive switching mechanism and optimizing memory performance. The first-principles calculation is effective in specifying the Cu diffusion path with atomic resolution. However, the results of first-principles calculations ever reported have been based on too simplified model to depict the actual system of CB-RAM. In this paper, a periodic slab model for first-principles calculation of Cu diffusion process in a Cu/HfO2/Pt CB-RAM element was proposed based on experimental results. Both Cu diffusion surface and Cu diffusion path were suggested by the first-principles calculations based on the model. In addition, it was suggested that both the Cu diffusion path and the diffusion barrier are drastically modified by introduction of oxygen vacancies into the Cu diffusion surface.

FM:P06  Resistive Switching Behavior of Undoped Hematite Film with Low Resistivity
Y. OGAWA, Y. SUTOU, D. ANDO, J. KOIKE, Department of Materials Science, Tohoku University, Sendai, Miyagi, Japan

Oxide materials have been attracting considerable attention for use as resistive random access memory (ReRAM). Among them, iron oxide is abundant and inexpensive material, and therefore, is attractive for ReRAM application. It has been reported that Fe3O4 shows a resistive switching behavior, which is due to oxygen moving and crystalline structure change from Fe3O4 to γ-Fe2O3 near an electrode. Very recently, we found that a low resistive Fe-O film (about 10-1Ωcm) with an α-Fe2O3 structure can be obtained by controlling oxygen gas flow rate during sputtering. Generally, α-Fe2O3 is known as an n-type semiconductor with a high resistivity of over 105Ωcm. However, interestingly, the film showed p-type conductivity. Therefore, we investigated the resistive switching behavior of the Fe-O film. In addition, we investigated the effect of electrode metals on the resistive switching behavior of the Fe-O film. The Fe-O film was deposited by RF magnetron sputtering of an iron target in an Ar-O2 reactive gas mixture at room temperature. The obtained Fe-O film showed the resistive switching and the behavior was different depending on the kind of electrode metals.

FM:P07  Switching in Polymer Memory Devices based on Polymer and Nanoparticles Admixture
Z. AL HALAFI, S. PAUL, Emerging Technologies Research Centre, De Montfort University, Leicester, UK

In recent years, a blend of polymer and nanoparticles has shown interesting electrical properties and such electrical behavior has been demonstrated for the application in electronic memory device[1]. In this article, memory devices were made from a polymer and nanoparticles blend that it is sandwiched between two metal electrodes. These devices display memory effects; a marked difference in electrical conductivity between the'on'and'off' states. Nevertheless, the exact mechanism under-pinning these two conductivities states is not very clear[2]. To understand the electrical bistability, we have investigated metal-admixture-metal(MAM)and metal-insulator-semiconductor(MIS)device structures; glass and p-types silicon (100 orientations) with a pre-prepared ohmic back contact were used for the MAM and MIS substrates respectively. This work will address some of the questions in regard to the electrical bistability shown by the polymer and nanoparticles blend. An intensive investigation was undertaken using Capacitance-Voltage and Current-Voltage techniques to unfurl the charging mechanism(s)in polymer memory devices. Fourier Transfer Infrared and Raman Spectroscopies were also used to understand the electrical bistability in polymer memory devices.
Reference: 1)Y Yang.etal.Adv.Funct.Mater,2006,16.

FM:P08  Two Terminal Non-volatile Memory Devices using Diamond-like Carbon and Silicon Nano-structures
S.R. ALOTAIBI, D. PRIME, S. PAUL, Emerging Technologies Research Centre, De Montfort University, Leicester, UK

This work demonstrates the use of Diamond like carbon (DLC) as a barrier layer in two terminal non-volatile memory devices (TT-NMDs)[1]; where memory elements, silicon nano-structures, is sandwich between two layers of DLC. Diamond-like Carbon has a number interesting properties which can beneficial to two terminal memory devices e.g. high thermal conductivity, its resistivity can be varied from insulating to semiconductor[2] and it can deposit at room temperature on variety of subsrates (including plastic) by plasma enhanced chemical vapour deposition (PECVD).
In this work, TT-NMDs were fabricated on glass substrate with the following structure; bottom and top metal contacts are of aluminium (Al), and silicon nano-structures sandwich between DLC layers; where silicon nano-structures are the memory elements The memory behaviour was observed from the hysteresis of current-voltage (I-V) and capacitance-voltage (C-V) characteristic while two distinguishable electrical conductivity states (''0'' and ''1'') were studied by current-time (I-t) measurements. Diamond-like Carbon and silicon nano-strucutres, both deposited by PECVD, were investigated by scanning electron microscope, ultra-violet visible spectroscopy (UVis), FTIR and atomic force microscope..
[1] N. Gabrielyan, K. Saranti, N. M. Krishna and S. Paul, Nanoscale Research Letters, vol. 8, pp. 83-83, 2013.
[2] Paul, S. and Clough, F.J. 2003, Microelectronic Engineering, vol. 70, no. 1, pp. 78-82

FM:P09  Magnon and Electromagnon Excitations in BiFeO3
N. FURUKAWA, Dept. of Physics, Aoyama Gakuin University, Sagamihara, Japan; S. Miyahara, Department of Applied Physics, Fukuoka University, Fukuoka, Japan

BiFeO3 is one of a few multiferroic compounds that function at room temperatures, where possible applications magnetic, ferroelectric and phononic defices have been proposed. In order to study the bulk and domain dynamics of this compound, we have determined a precise model which reproduces optical spectra in THz regions [Nagel et al., PRL 110, 257201 (2013)]. By assuming magneto-electric couplings, we also clarifiy the existence of electromagnons in this system, which accompanies the non-reciprocal directional dichroism. We also discuss the symmetry breaking of the magnetic point group at low temperatures through the selection rules of the magnetic resonances.

FM:P10  Atomic Layer Deposition of HfxZr1-x Oy and TiN Thin Films for Ferroelectric Memory Applications
A.G. CHERNIKOVA, A.M. MARKEEV, YU.YU. LEBEDINSKII, A.V. ZABLOTSKIY, M.G. KOZODAEV, Moscow Institute of Physics and Technology, Dolgoprudny, Moscow region, Russia

Ferroelectricity recently discovered in the doped HfO2 thin films [1] resulted in a new impulse of both ferroelectric random access memory and ferroelectric field-effect-transistor memory development. The 3D geometry is a promising approach for both of these ferroelectric memories types. Thus, Atomic Layer Deposition (ALD) of not only HfO2 based ferroelectric layer but also metallic electrodes (e.g. TiN) is of great importance. In this work an experimental cluster-type set up combining ALD growth module and XPS analytical module was used for growth HfxZr1-x Oy/TiN structures and in vacuo XPS monitoring of its chemical state, effective work functions and interface embedded layer engineering. The thin films internal stresses measurements, XRD and PFM analysis were also employed to define the correlation between the thin films chemical-structural characteristics and ferroelectric properties.
[1] T. S. Boscke, J. Muller, D. Brauhaus, U. Schoder, and U. Bottger, Appl. Phys. Lett. 99, 102903 (2011)

FM:P11  Memristive Switching of Thin Sputtered Vanadium Dioxide Films
S. FABRETTI, S. NIEHÖRSTER, Bielefeld University, Bielefeld, Germany; A. THOMAS, Bielefeld and Mainz University, Germany

Vanadium dioxide is a very interesting material. It undergoes a change of the crystal structure above 68C, which changes the electrical conductivity. This behavior can be utilized to fabricate memristive devices.
The vanadium oxide films were fabricated by magnetron co-sputtering. In particular, we reduced the composition on the surface of our samples to vanadium dioxide by controlled argon ion bombardment. With this technique, we are able to get a small vanadium dioxide layer on the sample surface. This mixed vanadium pentoxide and vanadium dioxide layers offer us the possibility to get a metal‐semiconductor transition. The top layer shows a metal insulator transition and the surface becomes insulating at a particular temperature. The samples were characterized by x-ray diffraction and transport measurements. For the transport measurements, the samples were placed on a heating plate. They show a sharp (<1°C) change of the resistance while warming up as well as cooling down. The transition occurs at 65.3°C during the heating process and during the cooling process the resistance change occurs at 51.3°C.

FM:P12  TaO Based Memristive Tunnel Junctions
S. NIEHÖRSTER, S. FABRETTI, M. SCHÄFERS, Bielefeld University, Bielefeld, Germany; A. THOMAS, Mainz University, Mainz, Germany

TaOx based devices show reversible and nonvolatile memristive switching effects for a large number of cycles. This property makes them very interesting for data storage applications or imitating synapses in a neural network.
We prepared devices with Pd and Ta electrodes and a TaOx barrier. The electrodes were deposited by magnetron sputtering and the tunnel barrier was fabricated by in-situ oxidation of a thin sputtered Ta film. This approach gives us the possibility to manipulate the oxygen concentration of the barrier compared to sputter deposition of a TaOx target. We varied the bias voltage of the oxygen plasma to regulate the thickness of the barrier by the penetration depth, and we varied the oxidation time to regulate the oxygen concentration.
We used optical lithography to define squares of 10x10, 15x15 or 25x25µm2. The junctions were characterized by transport measurements in two point geometry.
The measurements of our devices show memristive switching. Where the amplitude and the noise of the switching show a dependence on the oxidation time. In addition, we were able to reach more than two states. Then, the data is compared to our earlier results with MgO based tunnel junctions. The amplitude of the memristive switching was increased by a factor of 3.

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